Invention Grant
US08856579B2 Memory interface having extended strobe burst for read timing calibration
有权
存储器接口具有用于读取定时校准的扩展选通脉冲串
- Patent Title: Memory interface having extended strobe burst for read timing calibration
- Patent Title (中): 存储器接口具有用于读取定时校准的扩展选通脉冲串
-
Application No.: US12723885Application Date: 2010-03-15
-
Publication No.: US08856579B2Publication Date: 2014-10-07
- Inventor: Kevin C. Gower , Kyu-hyoun Kim
- Applicant: Kevin C. Gower , Kyu-hyoun Kim
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Patterson & Sheridan, LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/28 ; G06F1/04
Abstract:
Methods and systems for calibrating parameters for communication between a controller and a memory device. A memory controller may be configured to calibrate one or more of the read latency and/or the latency window of a memory controller such that a data signal and a data strobe signal are received by the memory controller within the latency window of the memory controller.
Public/Granted literature
- US20110225445A1 MEMORY INTERFACE HAVING EXTENDED STROBE BURST FOR READ TIMING CALIBRATION Public/Granted day:2011-09-15
Information query
