Invention Grant
- Patent Title: Semiconductor memory device detecting error
- Patent Title (中): 半导体存储器件检测错误
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Application No.: US13194122Application Date: 2011-07-29
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Publication No.: US08856614B2Publication Date: 2014-10-07
- Inventor: Takahiro Yamashita
- Applicant: Takahiro Yamashita
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-171134 20100729; JP2011-061557 20110318
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F11/14

Abstract:
According to one embodiment, a semiconductor memory device includes first to fifth units. The first unit compares first data being write target data before write in a memory, with second data written in the memory and then read out. The second unit stores the first data if a data comparison result indicates mismatch. The third unit stores a write address corresponding to the write target data if the data comparison result indicates mismatch. The fourth unit compares a read address corresponding to read target data with an address stored in the third unit. The fifth unit selects data read out from the memory in accordance with the read address as the read target data if a address comparison result indicates mismatch, and selects data read out from the second unit as the read target data if the address comparison result indicates match.
Public/Granted literature
- US20120030441A1 SEMICONDUCTOR MEMORY DEVICE DETECTING ERROR Public/Granted day:2012-02-02
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