发明授权
- 专利标题: Reducing power consumption in a voltage regulator
- 专利标题(中): 降低电压调节器的功耗
-
申请号: US13472461申请日: 2012-05-15
-
公开(公告)号: US08878510B2公开(公告)日: 2014-11-04
- 发明人: Prasun Kali Bhattacharyya , Prakash Easwaran
- 申请人: Prasun Kali Bhattacharyya , Prakash Easwaran
- 申请人地址: IN Bangalore, Kamataka
- 专利权人: Cadence AMS Design India Private Limited
- 当前专利权人: Cadence AMS Design India Private Limited
- 当前专利权人地址: IN Bangalore, Kamataka
- 代理机构: Rosenberg, Klein & Lee
- 主分类号: G05F3/08
- IPC分类号: G05F3/08
摘要:
A voltage regulator includes an amplifier, a first buffer and a second buffer. The amplifier is designed to generate an error voltage between a reference voltage and a voltage at an output node of the voltage regulator. The first buffer is coupled to receive the amplified error voltage and, in response, to drive a first pass transistor. The first buffer includes a non-linear resistance element. The resistance of the non-linear resistance element varies non-linearly with a load current drawn from the output node. The second buffer is coupled to receive the amplified error voltage, and in response, to drive a second pass transistor. The second buffer includes a linear resistance element. The resistance of the linear element is a constant. The use of the non-linear resistance element enables reduction in power consumption in the voltage regulator.
公开/授权文献
- US20130307502A1 REDUCING POWER CONSUMPTION IN A VOLTAGE REGULATOR 公开/授权日:2013-11-21
信息查询
IPC分类: