发明授权
US08891312B2 Method and apparatus for reducing erase time of memory by using partial pre-programming
有权
通过使用部分预编程来减少存储器的擦除时间的方法和装置
- 专利标题: Method and apparatus for reducing erase time of memory by using partial pre-programming
- 专利标题(中): 通过使用部分预编程来减少存储器的擦除时间的方法和装置
-
申请号: US13453312申请日: 2012-04-23
-
公开(公告)号: US08891312B2公开(公告)日: 2014-11-18
- 发明人: Chun-Yi Lee , Kuen-Long Chang , Chun-Hsiung Hung
- 申请人: Chun-Yi Lee , Kuen-Long Chang , Chun-Hsiung Hung
- 申请人地址: TW Hsinchu
- 专利权人: Macronix International Co., Ltd.
- 当前专利权人: Macronix International Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Haynes Beffel & Wolfeld LLP
- 代理商 Kenta Suzue
- 主分类号: G11C16/04
- IPC分类号: G11C16/04
摘要:
Memory cells of a nonvolatile memory array are characterized by one of multiple threshold voltage ranges including at least an erased threshold voltage range and a programmed threshold voltage range. Responsive to an erase command to erase a group of memory cells of the nonvolatile memory array, a plurality of phases are performed, including at least a pre-program phase and an erase phase. The pre-program phase programs a first set of memory cells in the group having threshold voltages within the erased threshold voltage range, and does not program a second set of memory cells in the group having threshold voltages within the erased threshold voltage range in the group. By not programming the second set of memory cells, the pre-program phase is performed more quickly than if the second set of memory cells were programmed along with the first set of memory cells.
公开/授权文献
信息查询