A method includes preferentially placing fill regions adjacent to transistors of a particular conductivity type, such as p-channel transistors, for a plurality of standard cell instances of a device design. The method also includes evaluating all transistors of the first conductivity type prior to evaluating any transistors of a second conductivity type. The second conductivity type is opposite the first conductivity type. For each transistor being evaluated, it is determined whether a criterion is me. A fill region is placed within a field isolation region adjacent to the transistor if the criterion is met.