发明授权
US08928383B2 Integrated delayed clock for high speed isolated SPI communication 有权
用于高速隔离SPI通信的集成延迟时钟

Integrated delayed clock for high speed isolated SPI communication
摘要:
A system may include a plurality of isolators to transfer data signals across an isolation barrier, one of the signals including a clock signal. A delay circuit may be included to receive the clock signal and provide a delayed clock signal that lags the clock signal by an amount representing a delay across the isolation barrier. The delayed clock signal may be delayed by a round trip propagation delay over the isolation barrier. The delayed clock signal may be used as a reference to read data sent over the isolation barrier.
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