发明授权
US08930776B2 Implementing DRAM command timing adjustments to alleviate DRAM failures
有权
实施DRAM命令定时调整以减轻DRAM故障
- 专利标题： Implementing DRAM command timing adjustments to alleviate DRAM failures
- 专利标题（中）： 实施DRAM命令定时调整以减轻DRAM故障
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申请号： US13598072申请日： 2012-08-29
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公开(公告)号： US08930776B2公开(公告)日： 2015-01-06
- 发明人: Edgar R. Cordero , Joab D. Henderson , Divya Kumar , Jeffrey A. Sabrowski , Anuwat Saetow
- 申请人： Edgar R. Cordero , Joab D. Henderson , Divya Kumar , Jeffrey A. Sabrowski , Anuwat Saetow
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理商 Joan Pennington
- 主分类号： G06F11/00
- IPC分类号： G06F11/00
摘要：
A method, system and computer program product are provided for implementing command timing adjustments to alleviate Dynamic Random Access Memory (DRAM) failures in a computer system. A predefined DRAM failure is detected. Responsive to the detected failure, a set of timers is adjusted for controlling predetermined timings used to access the DRAM. Responsive to the failure being resolved by the adjusted set of timers, checking for a predetermined level of performance is performed.
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