Invention Grant
- Patent Title: Methods for fabricating integrated circuits utilizing silicon nitride layers
- Patent Title (中): 利用氮化硅层制造集成电路的方法
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Application No.: US13787521Application Date: 2013-03-06
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Publication No.: US08940650B2Publication Date: 2015-01-27
- Inventor: Huy Cao , Huang Liu , Hoong Shing Wong , Songkram Srivathanakul , Sandeep Gaan
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, Inc.
- Current Assignee: GLOBALFOUNDRIES, Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/02

Abstract:
A method of fabricating an integrated circuit includes the steps of providing a semiconductor substrate comprising a semiconductor device disposed thereon and depositing a first silicon nitride layer over the semiconductor substrate and over the semiconductor device using a first deposition process. The first deposition process is a plasma-enhanced chemical vapor deposition (PECVD) process that operates over a plurality of cycles, each cycle having a first time interval and a second time interval. The PECVD process includes the steps of generating a plasma with a power source during the first time interval, the plasma comprising reactive ionic and radical species of a silicon-providing gas and a nitrogen-providing gas, and discontinuing generating the plasma during the second time interval immediately subsequent to the first time interval. The method further includes depositing a second silicon nitride layer over the first silicon nitride layer after the plurality of cycles.
Public/Granted literature
- US20140256141A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS UTILIZING SILICON NITRIDE LAYERS Public/Granted day:2014-09-11
Information query
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