发明授权
- 专利标题: Information processor and multi-core system
- 专利标题(中): 信息处理器和多核系统
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申请号: US13205048申请日: 2011-08-08
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公开(公告)号: US08959303B2公开(公告)日: 2015-02-17
- 发明人: Hiroyuki Usui
- 申请人: Hiroyuki Usui
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Knobbe, Martens, Olson & Bear, LLP
- 优先权: JP2011-068367 20110325
- 主分类号: G06F12/00
- IPC分类号: G06F12/00 ; G06F12/10 ; G06F12/14 ; G06F13/00 ; G06F13/28 ; G06F21/50 ; G06F12/02
摘要:
According to one embodiment, an information processor includes an operator and an address protector. The address protector includes a register access interface, an address table, and an access determination module. The register access interface is configured to receive address protection information from the operator. The address table is configured to store the received address protection information. The access determination module is configured to determine whether an access to an address specified by the operator is allowable based on the address protection information, and configured to output an interrupt signal to the operator when the access is unallowable.
公开/授权文献
- US20120246441A1 INFORMATION PROCESSOR AND MULTI-CORE SYSTEM 公开/授权日:2012-09-27
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