Each of a first and second image acquisition device includes: a circuit for providing a primary clock signal and a frequency synthesizing circuit capable of generating at least one secondary clock signal from said primary clock signal. The frequency synthesizing circuit in each image acquisition device has a fractional phase-locked loop configuration. A synchronization comparison circuit in each image acquisition device functions to compare sync between an external sync signal and an internal sync signal. An adjustment of the fraction phase lock loop operation is made in response to the sync comparison.