发明授权
US08988967B2 Method of increasing a timing margin for relaying data to a memory array
有权
增加将数据中继到存储器阵列的定时裕度的方法
- 专利标题： Method of increasing a timing margin for relaying data to a memory array
- 专利标题（中）： 增加将数据中继到存储器阵列的定时裕度的方法
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申请号： US13572815申请日： 2012-08-13
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公开(公告)号： US08988967B2公开(公告)日： 2015-03-24
- 发明人: Phat Truong , Tien Dinh Le
- 申请人： Phat Truong , Tien Dinh Le
- 申请人地址： TW Tao-Yuan Hsien
- 专利权人： Nanya Technology Corp.
- 当前专利权人： Nanya Technology Corp.
- 当前专利权人地址： TW Tao-Yuan Hsien
- 代理机构： Volpe and Koenig, P.C.
- 主分类号： G11C8/18
- IPC分类号： G11C8/18 ; G11C7/22 ; G11C7/10 ; G11C11/4076
摘要：
A method is provided for relaying data to a memory array operating in synchronization with a clock signal having a first transition edge. A data strobe signal having a second transition edge corresponding to the first transition edge is provided. A first signal is provided. The data is latched into the first signal at a first time point lagged behind the first transition edge by a first time interval until a second time point in response to the first transition edge for relaying the data of the first signal to the memory array when the second transition edge appears earlier than the first transition edge.
公开/授权文献
- US20120307570A1 METHOD FOR RELAYING DATA TO MEMORY ARRAY 公开/授权日：2012-12-06
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