Invention Grant
- Patent Title: Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies and stacked semiconductor devices
- Patent Title (中): 半导体组件,堆叠半导体器件,以及制造半导体组件和堆叠半导体器件的方法
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Application No.: US13749521Application Date: 2013-01-24
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Publication No.: US08994163B2Publication Date: 2015-03-31
- Inventor: David S. Pratt
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/48 ; H01L21/768 ; H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L21/683

Abstract:
Stacked semiconductor devices, semiconductor assemblies, methods of manufacturing stacked semiconductor devices, and methods of manufacturing semiconductor assemblies. One embodiment of a semiconductor assembly comprises a thinned semiconductor wafer having an active side releaseably attached to a temporary carrier, a back side, and a plurality of first dies at the active side. The individual first dies have an integrated circuit, first through die interconnects electrically connected to the integrated circuit, and interconnect contacts exposed at the back side of the wafer. The assembly further includes a plurality of separate second dies attached to corresponding first dies on a front side, wherein the individual second dies have integrated circuits, through die interconnects electrically connected to the integrated circuits and contact points at a back side, and wherein the individual second dies have a thickness of approximately less than 100 microns.
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Information query
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