发明授权
US09015451B2 Processor including a cache and a scratch pad memory and memory control method thereof
有权
处理器包括高速缓存和临时存储器及其存储器控制方法
- 专利标题： Processor including a cache and a scratch pad memory and memory control method thereof
- 专利标题（中）： 处理器包括高速缓存和临时存储器及其存储器控制方法
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申请号： US12048658申请日： 2008-03-14
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公开(公告)号： US09015451B2公开(公告)日： 2015-04-21
- 发明人: Il Hyun Park , Soojung Ryu , Dong-Hoon Yoo , Dong Kwan Suh , Jeongwook Kim , Choon Ki Jang
- 申请人： Il Hyun Park , Soojung Ryu , Dong-Hoon Yoo , Dong Kwan Suh , Jeongwook Kim , Choon Ki Jang
- 申请人地址： KR Suwon-si KR Seoul
- 专利权人： Samsung Electronics Co., Ltd.,Seoul National University R&DB Foundation
- 当前专利权人： Samsung Electronics Co., Ltd.,Seoul National University R&DB Foundation
- 当前专利权人地址： KR Suwon-si KR Seoul
- 代理机构： NSIP Law
- 优先权： KR10-2007-0112852 20071106
- 主分类号： G06F15/00
- IPC分类号： G06F15/00 ; G06F7/38 ; G06F9/00 ; G06F9/44 ; G06F9/38
摘要：
A processor and a memory management method are provided. The processor includes a processor core, a cache which transceives data to/from the processor core via a single port, and stores the data accessed by the processor core, and a Scratch Pad Memory (SPM) which transceives the data to/from the processor core via at least one of a plurality of multi ports.
公开/授权文献
- US20090119456A1 PROCESSOR AND MEMORY CONTROL METHOD 公开/授权日：2009-05-07