Invention Grant
US09041212B2 Thermal design and electrical routing for multiple stacked packages using through via insert (TVI)
有权
使用通孔插入(TVI)的多个堆叠封装的热设计和电气布线
- Patent Title: Thermal design and electrical routing for multiple stacked packages using through via insert (TVI)
- Patent Title (中): 使用通孔插入(TVI)的多个堆叠封装的热设计和电气布线
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Application No.: US13787476Application Date: 2013-03-06
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Publication No.: US09041212B2Publication Date: 2015-05-26
- Inventor: Dong Wook Kim , Victor Adrian Chiriac , Kyu-Pyung Hwang , Changhan Hobie Yun , Young Kyu Song
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/34 ; H01L23/367 ; H01L23/538 ; H01L25/065

Abstract:
Some implementations provide a semiconductor package structure that includes a package substrate, a first package, an interposer coupled to the first package, and a first set of through via insert (TVI). The first set of TVI is coupled to the interposer and the package substrate. The first set of TVI is configured to provide heat dissipation from the first package. In some implementations, the semiconductor package structure further includes a heat spreader coupled to the interposer. The heat spreader is configured to dissipate heat from the first package. In some implementations, the first set of TVI is further configured to provide an electrical path between the first package and the package substrate. In some implementations, the first package is electrically coupled to the package substrate through the interposer and the first set of TVI. In some implementations, the first set of TVI includes a dielectric layer and a metal layer.
Public/Granted literature
- US20140252645A1 THERMAL DESIGN AND ELECTRICAL ROUTING FOR MULTIPLE STACKED PACKAGES USING THROUGH VIA INSERT (TVI) Public/Granted day:2014-09-11
Information query
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