A system for deadlock recovery of distributed devices may include a processor and memory. The processor may transmit packets to a device, receive a pause message indicating that the packet transmission should be paused, and initiate a timer and pause the packet transmission in response to receiving the pause message. The processor may enter a deadlock recovery state if the timer reaches a timeout before a resume message is received that indicates that the packet transmission can resume. The processor may, while in the deadlock recovery state, drop packets that have a packet age that is greater than a threshold, and may exit the deadlock recovery state upon dropping a packet that has a packet age less than the threshold, or upon receiving the resume message. The processor may re-initiate the timer if the resume message has not been received, otherwise the processor may resume the packet transmission.