Disclosed is a method and system for clock tree construction across clock domains, an integrated circuit and fabrication method thereof. A method for clock tree construction includes acquiring a netlist describing an integrated circuit (IC), comprising data for describing physical locations and logic connections of clock sinks belonging to multiple clock domains on the pattern of the IC, and constructing the clock tree across clock domains based on the netlist, such that clock cells belonging to different clock domains can share more physical locations. Accordingly, clock trees can be constructed across clock domains to improve IC performance.