发明授权
US09054208B2 Methods for forming contact landing regions in split-gate non-volatile memory (NVM) cell arrays
有权
在分闸门非易失性存储器(NVM)单元阵列中形成接触着陆区域的方法
- 专利标题: Methods for forming contact landing regions in split-gate non-volatile memory (NVM) cell arrays
- 专利标题(中): 在分闸门非易失性存储器(NVM)单元阵列中形成接触着陆区域的方法
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申请号: US14022646申请日: 2013-09-10
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公开(公告)号: US09054208B2公开(公告)日: 2015-06-09
- 发明人: Jane A. Yater , Cheong Min Hong , Sung-Taeg Kang
- 申请人: Jane A. Yater , Cheong Min Hong , Sung-Taeg Kang
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Egan, Peterman & Enders LLP.
- 主分类号: H01L21/3205
- IPC分类号: H01L21/3205 ; H01L29/788 ; H01L29/66 ; H01L27/115
摘要:
Methods and related structures are disclosed for forming contact landing regions in split-gate NVM (non-volatile memory) systems. A dummy select gate structure is formed while also forming select gates for split-gate NVM cells. A control gate layer is formed over the select gates and the dummy select gate structure, as well as an intervening charge storage layer. The control gate material will fill in gaps between the select gate material and the dummy select gate material. A non-patterned spacer etch is then used to etch the control gate layer to form a contact landing region associated with the dummy select gate structure while also forming spacer control gates for the split-gate NVM cells. The disclosed embodiments provide improved (e.g., more planar) contact landing regions without requiring additional processing steps and without increasing the pitch of the resulting NVM cell array.
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