Invention Grant
- Patent Title: Inline measurement of through-silicon via depth
- Patent Title (中): 通过深度在线测量直通硅
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Application No.: US13889374Application Date: 2013-05-08
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Publication No.: US09059051B2Publication Date: 2015-06-16
- Inventor: Hanyi Ding , J. Edwin Hostetter, Jr. , Ping-Chuan Wang , Kimball M. Watson
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Howard H. Cohn; William H. Steinberg
- Main IPC: H01L21/66
- IPC: H01L21/66

Abstract:
A through-silicon via (TSV) capacitive test structure and method of determining TSV depth based on capacitance is disclosed. The TSV capacitive test structure is formed from a plurality of TSV bars that are evenly spaced. A first group of bars are electrically connected to form a first capacitor node, and a second group of bars is electrically connected to form a second capacitor node. The capacitance is measured, and a TSV depth is computed, prior to backside thinning. The computed TSV depth may then be fed to downstream grinding and/or polishing tools to control the backside thinning process such that the semiconductor wafer is thinned such that the backside is flush with the TSV.
Public/Granted literature
- US20140332973A1 INLINE MEASUREMENT OF THROUGH-SILICON VIA DEPTH Public/Granted day:2014-11-13
Information query
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