An array substrate comprises a substrate, a gate electrode, a source electrode and a drain electrode, the source electrode and the drain electrode being provided in different areas on the substrate and the vertical projections of the source electrode and the drain electrode on the substrate having an overlapping area; a semiconductor layer formed between the source electrode and the drain electrode, a vertical projection of the semiconductor layer on the substrate having overlapping areas with the vertical projections of the source electrode and the drain electrode on the substrate; a first insulating layer formed on the substrate while below the gate electrode and covering the source electrode or the drain electrode; a pixel electrode, a gate line, and a data line. A manufacturing method for the array substrate is also disclosed.