发明授权
- 专利标题: Providing logical partions with hardware-thread specific information reflective of exclusive use of a processor core
- 专利标题(中): 提供逻辑分支与反映独家使用处理器核心的硬件线程特定信息
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申请号: US13345002申请日: 2012-01-06
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公开(公告)号: US09069598B2公开(公告)日: 2015-06-30
- 发明人: Giles R. Frazier , Bruce Mealy , Naresh Nayar
- 申请人: Giles R. Frazier , Bruce Mealy , Naresh Nayar
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 代理机构: Mitch Harris, Atty at Law, LLC
- 代理商 Andrew M. Harris; Steven L. Bennett
- 主分类号: G06F9/455
- IPC分类号: G06F9/455 ; G06F9/38
摘要:
Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.