Invention Grant
US09082665B2 Fanout line structure of array substrate and display panel 有权
阵列基板和显示面板的扇出线结构

  • Patent Title: Fanout line structure of array substrate and display panel
  • Patent Title (中): 阵列基板和显示面板的扇出线结构
  • Application No.: US14008539
    Application Date: 2013-06-28
  • Publication No.: US09082665B2
    Publication Date: 2015-07-14
  • Inventor: Peng Du
  • Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD
  • Priority: CN201310173613 20130513
  • International Application: PCT/CN2013/078292 WO 20130628
  • International Announcement: WO2014/183327 WO 20141120
  • Main IPC: H01L27/12
  • IPC: H01L27/12 G02F1/1345
Fanout line structure of array substrate and display panel
Abstract:
A fanout line structure of an array substrate includes a plurality of fanout lines arranged on a fanout area of the array substrate, where resistance value of the fanout line is dependent on length of the fanout line. Each of the fanout lines comprises a first conducting film. Resistance values of a first part of fanout lines are less than resistance values of a second part of the fanout lines, and the first part of fanout lines are covered by an additional conducting film. In the fanout lines covered by the additional conducting film, as the resistance value of the fanout line, increases, area of the additional conducting film covering the fanout line correspondingly decreases. An additional capacitor is generated between the additional conducting film and the first conducting film.
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