Invention Grant
- Patent Title: Sense amplifier circuit and semiconductor memory device
- Patent Title (中): 感应放大器电路和半导体存储器件
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Application No.: US14059619Application Date: 2013-10-22
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Publication No.: US09087558B2Publication Date: 2015-07-21
- Inventor: Dong-Hak Shin , Yong-Sang Park , Young-Yong Byun , In-Chul Jeong
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2013-0017252 20130219
- Main IPC: G11C7/06
- IPC: G11C7/06 ; G11C7/08 ; G11C7/12 ; G11C7/18 ; G11C11/4076 ; G11C11/4091 ; G11C11/4094 ; G11C11/4097 ; G11C11/4099

Abstract:
A semiconductor device may comprise a first bit line, a second bit line, a memory cell connected to the first bit line, a bit line sense amplifier circuit and a control circuit. The bit line sense amplifier circuit may be coupled to the memory cell. The bit line sense amplifier circuit may include a first inverter having an input node coupled to the first bit line and an output node coupled to the second bit line, and a second inverter having an input node coupled to the second bit line and an output node coupled to the first bit line. The control circuit may be configured to activate the first inverter without activating the second inverter during a first time period and to activate the first inverter and the second inverter at the same time during a second time period after the first time period.
Public/Granted literature
- US20140233336A1 SENSE AMPLIFIER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2014-08-21
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