发明授权
US09093318B2 Memory transistor with multiple charge storing layers and a high work function gate electrode
有权
具有多个电荷存储层和高功函数栅电极的存储晶体管
- 专利标题： Memory transistor with multiple charge storing layers and a high work function gate electrode
- 专利标题（中）： 具有多个电荷存储层和高功函数栅电极的存储晶体管
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申请号： US14159315申请日： 2014-01-20
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公开(公告)号： US09093318B2公开(公告)日： 2015-07-28
- 发明人: Igor Polishchuk , Sagy Charel Levy , Krishnaswamy Ramkumar
- 申请人： Cypress Semiconductor Corporation
- 申请人地址： US CA San Jose
- 专利权人： Cypress Semiconductor Corporation
- 当前专利权人： Cypress Semiconductor Corporation
- 当前专利权人地址： US CA San Jose
- 主分类号： H01L29/792
- IPC分类号： H01L29/792 ; H01L27/115 ; H01L29/423 ; H01L29/51 ; H01L29/66 ; B82Y10/00 ; H01L21/28 ; G11C16/04 ; H01L29/49
摘要：
A memory device is described. Generally, the device includes a memory transistor and a metal oxide semiconductor (MOS) logic transistor. The memory transistor includes: a channel region electrically connecting a source region and a drain region, the channel region comprising polysilicon; an oxide-nitride-nitride-oxide (ONNO) stack disposed above the channel region, the ONNO stack comprising a multi-layer charge-trapping region including an oxygen-rich first nitride layer and an oxygen-lean second nitride layer disposed above the first nitride layer; and a gate electrode comprising doped polysilicon formed over a surface of the ONNO stack. The MOS logic transistor includes a gate oxide and a gate electrode comprising doped polysilicon. Other embodiments are also described.
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