发明授权
US09093499B2 Integrated circuit using FDSOI technology, with well sharing and means for biasing oppositely doped ground planes present in a same well
有权
使用FDSOI技术的集成电路，具有良好的共享和用于偏置存在于同一井中的相反掺杂的接地平面的装置
- 专利标题： Integrated circuit using FDSOI technology, with well sharing and means for biasing oppositely doped ground planes present in a same well
- 专利标题（中）： 使用FDSOI技术的集成电路，具有良好的共享和用于偏置存在于同一井中的相反掺杂的接地平面的装置
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申请号： US13627059申请日： 2012-09-26
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公开(公告)号： US09093499B2公开(公告)日： 2015-07-28
- 发明人: Jean-Philippe Noel , Bastien Giraud , Olivier Thomas
- 申请人： Jean-Philippe Noel , Bastien Giraud , Olivier Thomas
- 申请人地址： FR Paris
- 专利权人： Commissariat à l'énergie atomique et aux énergies alternatives
- 当前专利权人： Commissariat à l'énergie atomique et aux énergies alternatives
- 当前专利权人地址： FR Paris
- 代理机构： Occhiuti & Rohlicek LLP
- 优先权： FR1158544 20110926
- 主分类号： H01L29/66
- IPC分类号： H01L29/66 ; H01L29/786 ; H01L21/768 ; H01L21/84 ; H01L27/12 ; H01L27/092 ; H01L21/8238
摘要：
A manufacture includes an IC comprising a stacking of a semiconducting substrate, a buried insulating layer, and a semiconducting layer, a first electronic component formed in and/or on the semiconductor layer, a bias circuit to generate a first bias voltage, first and second via-type interconnections, to which the bias circuit applies a same bias voltage equal to the first bias voltage, a first insulation trench separating the first electronic component from the first and second interconnections, a first ground plane having a first type of doping, placed beneath the buried insulating layer plumb with the first electronic component, and extending beneath the first insulation trench and up into contact the first interconnection, and a first well having a second type of doping opposite that of the first type, plumb with the first ground plane, and extending beneath the first insulation trench and up into contact with the second interconnection.
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