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US09093554B2 Methods of forming semiconductor devices with embedded semiconductor material as source/drain regions using a reduced number of spacers 有权
使用减少数量的间隔物形成具有嵌入式半导体材料的半导体器件作为源极/漏极区域的方法

Methods of forming semiconductor devices with embedded semiconductor material as source/drain regions using a reduced number of spacers
摘要：
In one example, a method disclosed herein includes the steps of forming a gate structure for a first transistor and a second transistor above a semiconducting substrate, forming a liner layer above the gate structures and performing a plurality of extension ion implant processes through the liner layer to form extension implant regions in the substrate for the first transistor and the second transistor. The method further includes forming a first sidewall spacer proximate the gate structure for the first transistor and a patterned hard mask layer positioned above the second transistor, performing at least one etching process to remove the first sidewall spacer, the patterned hard mask layer and the liner layer, forming a second sidewall spacer proximate both of the gate structures and performing a plurality of source/drain ion implant processes to form deep source/drain implant regions in the substrate for the first transistor and the second transistor.
摘要（中）：

在一个示例中，本文公开的方法包括以下步骤：在半导体衬底上形成用于第一晶体管和第二晶体管的栅极结构，在栅极结构上方形成衬底层，并通过衬里层执行多个延伸离子注入工艺 以在第一晶体管和第二晶体管的衬底中形成延伸注入区。 该方法还包括形成靠近第一晶体管的栅极结构的第一侧壁隔离物和位于第二晶体管上方的图案化硬掩模层，执行至少一个蚀刻工艺以去除第一侧壁间隔物，图案化硬掩模层和衬垫 形成靠近两个栅极结构的第二侧壁间隔件，并且执行多个源极/漏极离子注入工艺以在用于第一晶体管和第二晶体管的衬底中形成深源极/漏极注入区域。

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