Invention Grant
- Patent Title: Method of manufacturing semiconductor device and semiconductor device
- Patent Title (中): 制造半导体器件和半导体器件的方法
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Application No.: US14089959Application Date: 2013-11-26
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Publication No.: US09099334B2Publication Date: 2015-08-04
- Inventor: Yasushi Ishii , Hiraku Chakihara , Kentaro Saito
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2011-236675 20111028
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L27/088 ; H01L21/82 ; H01L21/8234 ; H01L21/8238 ; H01L21/28

Abstract:
An improvement is achieved in the manufacturing yield of a semiconductor device including a plurality of field effect transistors having different characteristics over the same substrate. By combining anisotropic dry etching with isotropic wet etching or isotropic dry etching, three types of sidewalls having different sidewall lengths are formed. By reducing the number of anisotropic dry etching steps, in a third n-type MISFET region and a third p-type MISFET region where layout densities are high, it is possible to prevent a semiconductor substrate from being partially cut between n-type gate electrodes adjacent to each other, between the n-type gate electrode and a p-type gate electrode adjacent to each other, and the p-type gate electrodes adjacent to each other.
Public/Granted literature
- US20140077310A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2014-03-20
Information query
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