Invention Grant
- Patent Title: Programmable array of silicon nanowire field effect transistor and method for fabricating the same
- Patent Title (中): 硅纳米线场效应晶体管的可编程阵列及其制造方法
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Application No.: US13503240Application Date: 2011-11-18
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Publication No.: US09099500B2Publication Date: 2015-08-04
- Inventor: Ru Huang , Jibin Zou , Runsheng Wang , Jiewen Fan , Changze Liu , Yangyuan Wang
- Applicant: Ru Huang , Jibin Zou , Runsheng Wang , Jiewen Fan , Changze Liu , Yangyuan Wang
- Applicant Address: CN Beijing
- Assignee: Peking University
- Current Assignee: Peking University
- Current Assignee Address: CN Beijing
- Agency: DLA Piper LLP (US)
- Priority: CN201110089699 20110411
- International Application: PCT/CN2011/082465 WO 20111118
- International Announcement: WO2012/139382 WO 20121018
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8238 ; H01L27/092 ; H01L29/06 ; H01L29/775 ; B82Y10/00 ; H01L21/02 ; B82Y99/00

Abstract:
The present invention discloses a hexagonal programmable array based on a silicon nanowire field effect transistor and a method for fabricating the same. The array includes a nanowire device, a nanowire device connection region and a gate connection region, wherein, the nanowire device has a cylinder shape, and includes a silicon nanowire channel, a gate dielectric layer, and a gate region, the nanowire channel being surrounded by the gate dielectric layer, and the gate dielectric layer being surrounded by the gate region; the nanowire devices are arranged in a hexagon shape to form programming unit, the nanowire device connection region is a connection node of three nanowire devices and secured to a silicon supporter. The present invention can achieve a complex control logic of interconnections and is suitable for a digital/analog and a mixed-signal circuit having a high integration degree and a high speed.
Public/Granted literature
- US20130075701A1 PROGRAMMABLE ARRAY OF SILICON NANOWIRE FIELD EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME Public/Granted day:2013-03-28
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