发明授权
US09100028B2 Clock generation circuit and semiconductor device provided therewith
有权
时钟生成电路及与此相关的半导体装置
- 专利标题: Clock generation circuit and semiconductor device provided therewith
- 专利标题(中): 时钟生成电路及与此相关的半导体装置
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申请号: US13023489申请日: 2011-02-08
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公开(公告)号: US09100028B2公开(公告)日: 2015-08-04
- 发明人: Takeshi Osada
- 申请人: Takeshi Osada
- 申请人地址: JP Atsugi-shi, Kanagawa-ken
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Atsugi-shi, Kanagawa-ken
- 代理机构: Robison Intellectual Property Law Offic, P.C.
- 代理商 Eric J. Robinson
- 优先权: JP2005-158220 20050530
- 主分类号: H04B1/06
- IPC分类号: H04B1/06 ; H03L7/18
摘要:
It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.
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