发明授权
US09104327B2 Fast translation indicator to reduce secondary address table checks in a memory device 有权
快速翻译指示符,以减少存储设备中的辅助地址表检查

Fast translation indicator to reduce secondary address table checks in a memory device
摘要:
A system and method for reducing the need to check both a secondary address table and a primary address table for logical to physical translation tasks is disclosed. The method may include generating a fast translation indicator, such as a logical group bitmap, indicating whether there is an entry in the secondary address table that contains desired information pertaining to a particular logical address. Upon a host request relating to the particular logical address, the storage device may check the bitmap to determine if retrieval and parsing of the secondary table is necessary. The system may include a storage device having RAM cache storage, flash storage and a controller configured to generate and maintain at least one fast translation indicator to reduce the need to check both secondary and primary address tables during logical to physical address translation operations of the storage device.
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