Invention Grant
US09123410B2 Memory controller for reducing capacitive coupling in a cross-point memory
有权
用于减少交叉点存储器中的电容耦合的存储器控制器
- Patent Title: Memory controller for reducing capacitive coupling in a cross-point memory
- Patent Title (中): 用于减少交叉点存储器中的电容耦合的存储器控制器
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Application No.: US14011476Application Date: 2013-08-27
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Publication No.: US09123410B2Publication Date: 2015-09-01
- Inventor: Hernan A. Castro , Jeremy M. Hirst , Eric Carman
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Grossman, Tucker, Perreault & Pfleger, PLLC
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C13/00 ; G11C8/12

Abstract:
The present disclosure relates to a memory controller. The memory controller may include a memory controller module configured to identify a target word line in response to a memory access request, the target word line included in a cross-point memory, the memory controller module further configured to perform a memory access operation on a memory cell of the cross-point memory, the memory cell coupled between the target word line and a bit line; and a word line control module configured to float at least one adjacent word line adjacent the target word line, the floating comprising decoupling the at least one adjacent word line from at least one of a first voltage source or a second voltage source. In some embodiments, the floating reduces an effective capacitance associated with the target word line during the memory access operation.
Public/Granted literature
- US20150063021A1 MEMORY CONTROLLER FOR REDUCING CAPACITIVE COUPLING IN A CROSS-POINT MEMORY Public/Granted day:2015-03-05
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