Invention Grant
US09123565B2 Masks formed based on integrated circuit layout design having standard cell that includes extended active region 有权
基于集成电路布局设计形成的掩模,具有包括扩展活动区域的标准单元

Masks formed based on integrated circuit layout design having standard cell that includes extended active region
Abstract:
An integrated circuit layout that includes a first standard cell having a first transistor region and a second transistor region; a second standard cell having a third transistor region and a fourth transistor region. The first and second standard cells adjoin each other at side boundaries thereof and the first transistor region and the third transistor region are formed in a first continuous active region, and the second transistor region and the fourth transistor region are formed in a second continuous region.
Public/Granted literature
Information query
Patent Agency Ranking
0/0