Invention Grant
- Patent Title: Data error susceptible bit identification
- Patent Title (中): 数据误差敏感位识别
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Application No.: US14089143Application Date: 2013-11-25
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Publication No.: US09135385B2Publication Date: 2015-09-15
- Inventor: Sujan Pandey , Abhijit Kumar Deb , Hubertus Gerardus Hendrikus Vermeulen
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
As consistent with one or more embodiments, electronic circuitry is characterized to provide an indication of susceptibility of the circuitry to error. As consistent with one or more embodiments, bits corresponding to a circuit component of a circuit design are evaluated using a software program that characterizes a hardware description language representing the circuit components and their interconnectivity. A noise power value is calculated for each bit, and bits are identified as being susceptible to data error based upon the noise power value and a signal-to-noise (SNR) ratio reference value. A characterization of the circuit components (e.g., a quality factor) is provided based upon a number of bits susceptible to data errors.
Public/Granted literature
- US20150074631A1 DATA ERROR SUSCEPTIBLE BIT IDENTIFICATION Public/Granted day:2015-03-12
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