A semiconductor package includes a first semiconductor chip including a target circuit surface and a side surface, a first sealing insulating layer including a first surface positioned toward the target circuit surface and configured to seal the target circuit surface and the side surface, at least one wiring layer formed on the first surface of the first sealing insulating layer, at least one insulating layer formed on the at least one wiring layer, a second semiconductor chip mounted on the at least one insulating layer, and a second sealing insulating layer formed on the at least one insulating layer and configured to seal the second semiconductor chip.