Invention Grant
US09136254B2 Microelectronic package having wire bond vias and stiffening layer
有权
具有线接合通孔和加强层的微电子封装
- Patent Title: Microelectronic package having wire bond vias and stiffening layer
- Patent Title (中): 具有线接合通孔和加强层的微电子封装
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Application No.: US13757677Application Date: 2013-02-01
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Publication No.: US09136254B2Publication Date: 2015-09-15
- Inventor: Zhijun Zhao , Roseann Alatorre
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/04 ; H01L25/10 ; H01L23/31 ; H01L23/498 ; H01L21/56 ; H01L23/538 ; H01L23/00
Abstract:
Microelectronic components and methods forming such microelectronic components are disclosed herein. The microelectronic components may include a plurality of electrically conductive vias in the form of wire bonds extending from a bonding surface of a substrate, such as surfaces of electrically conductive elements at a surface of the substrate.
Public/Granted literature
- US20140217619A1 MICROELECTRONIC PACKAGE HAVING WIRE BOND VIAS AND STIFFENING LAYER Public/Granted day:2014-08-07
Information query
IPC分类:
