A method comprises generating a first set of configurations of a layout of semiconductor components. The configurations of the first set of configurations each satisfy a first sub-set of a set of design rules. The method also comprises generating a second set of configurations of the layout of semiconductor components. The second set of configurations are generated by eliminating one or more configurations of the first set of configurations based on a determination that the eliminated one or more configurations of the first set of configurations fail to satisfy a second sub-set of the set of design rules. The method further comprises selecting a layout generation configuration for generating the layout of semiconductor components. The method additionally comprises generating the layout of semiconductor components based on the selected layout generation configuration.