Invention Grant
US09143200B2 Apparatus and method of receiver architecture and low-complexity decoder for line-coded and amplitude-modulated signal 有权
用于线路编码和幅度调制信号的接收机架构和低复杂度解码器的装置和方法

Apparatus and method of receiver architecture and low-complexity decoder for line-coded and amplitude-modulated signal
Abstract:
In some examples, the receiver apparatus includes a receiver interface configured to receive a signal from a transmitter and output an input sequence of M-bit samples. The apparatus may also include a quantizer circuit configured to convert the input sequence of M-bit samples into an output sequence of N-bit samples, wherein M and N are positive integer numbers, and wherein M is greater than N. The apparatus may further include a decoder circuit configured to decode the output sequence of N-bit samples.
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