A thin film transistor array substrate includes: a substrate; a bottom gate electrode including a gate area doped with ion impurities and undoped areas on left and right sides of the gate area; an active layer on the bottom gate electrode with a first insulating layer therebetween and including a source contact region, a drain contact region, and an oxide semiconductor region; a top gate electrode on the active layer with a second insulating layer therebetween; and a source electrode in contact with the source contact region and a drain electrode in contact with the drain contact region, the source electrode and the drain electrode being on the top gate electrode with a third insulating layer therebetween. The oxide semiconductor region is between the source contact region and the drain contact region.