Invention Grant
- Patent Title: Methods for etching copper during the fabrication of integrated circuits
- Patent Title (中): 在制造集成电路期间蚀刻铜的方法
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Application No.: US14176697Application Date: 2014-02-10
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Publication No.: US09159683B2Publication Date: 2015-10-13
- Inventor: Reiner Willeke , Tanya Atanasova , Anh Duong , Greg Nowling
- Applicant: GLOBALFOUNDRIES Inc. , Intermolecular Inc.
- Applicant Address: KY Grand Cayman US CA San Jose
- Assignee: GLOBALFOUNDRIES, INC.,INTERMOLECULAR, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.,INTERMOLECULAR, INC.
- Current Assignee Address: KY Grand Cayman US CA San Jose
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/00 ; H01L21/3213

Abstract:
Methods for etching copper in the fabrication of integrated circuits are disclosed. In one exemplary embodiment, a method for fabricating an integrated circuit includes providing an integrated circuit structure including a copper bump structure and a copper seed layer underlying and adjacent to the copper bump structure and etching the seed layer selective to the copper bump structure using a wet etching chemistry consisting of H3PO4 in a volume percentage of about 0.07 to about 0.36, H2O2 in a volume percentage of about 0.1 to about 0.7, and a remainder of H2O, and optionally NH4OH.
Public/Granted literature
- US20150228595A1 METHODS FOR ETCHING COPPER DURING THE FABRICATION OF INTEGRATED CIRCUITS Public/Granted day:2015-08-13
Information query
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