Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a non-volatile memory is arranged into a plurality of blocks, with each of the blocks constituting an integral plural number N of fixed-sized, multi-bit transfer units. A processing circuit retrieves at least a portion of the data stored in a selected block to a volatile memory buffer in response to a transfer unit (TU) bit map. The TU bit map is stored in a memory and provides a multi-bit sequence of bits corresponding to the N transfer units of the selected block. The values of the bits in the multi-bit sequence of bits indicate whether the corresponding transfer units are to be retrieved.