Invention Grant
- Patent Title: Methods of forming semiconductor devices using a layer of material having a plurality of trenches formed therein
- Patent Title (中): 使用其中形成有多个沟槽的材料层形成半导体器件的方法
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Application No.: US14242329Application Date: 2014-04-01
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Publication No.: US09171934B2Publication Date: 2015-10-27
- Inventor: Ruilong Xie , William J. Taylor, Jr. , Ryan Ryoung-Han Kim
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/51 ; H01L21/02 ; H01L21/265 ; H01L21/28 ; H01L29/417 ; H01L29/423 ; H01L29/08

Abstract:
One method disclosed includes, among other things, forming a plurality of laterally spaced-apart source/drain trenches and a gate trench in a layer of material above an active region, performing at least one process operation through the spaced-apart source/drain trenches to form doped source/drain regions, forming a gate structure within the gate trench, and forming a gate cap layer above the gate structure positioned within the gate trench.
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Information query
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