Invention Grant
US09178038B2 Raised source/drain MOS transistor and method of forming the transistor with an implant spacer and an epitaxial spacer
有权
上升的源极/漏极MOS晶体管和用植入物间隔物和外延间隔物形成晶体管的方法
- Patent Title: Raised source/drain MOS transistor and method of forming the transistor with an implant spacer and an epitaxial spacer
- Patent Title (中): 上升的源极/漏极MOS晶体管和用植入物间隔物和外延间隔物形成晶体管的方法
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Application No.: US14609051Application Date: 2015-01-29
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Publication No.: US09178038B2Publication Date: 2015-11-03
- Inventor: Seung-Chul Song , James W. Blatchford , Kwan-Yong Lim
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank D. Cimino
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78 ; H01L29/66 ; H01L21/265 ; H01L29/08 ; H01L29/417
Abstract:
A raised source/drain MOS transistor is formed in a process that utilizes a first sidewall spacer when implanting a semiconductor region to form the heavily-doped source region and the heavily-doped drain region of the transistor, and a second different sidewall spacer when epitaxially growing the raised source region and the raised drain region of the transistor.
Public/Granted literature
Information query
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