- 专利标题: Bitstream buffer manipulation with a SIMD merge instruction
-
申请号: US13752953申请日: 2013-01-29
-
公开(公告)号: US09182987B2公开(公告)日: 2015-11-10
- 发明人: Yen-Kuang Chen , William W. Macy, Jr. , Matthew Holliman , Eric L. Debes , Minerva M. Yeung , Huy V. Nguyen , Julien Sebot
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Vecchia Patent Agent, LLC
- 主分类号: G06F5/01
- IPC分类号: G06F5/01 ; G06F9/30 ; G06F9/38 ; G06F17/14 ; G06F17/15 ; G06F15/80
摘要:
Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
公开/授权文献
信息查询