Invention Grant
US09183934B2 Split block semiconductor memory device 有权
分割块半导体存储器件

Split block semiconductor memory device
Abstract:
A flash memory capable of writing or deleting a split block is provided. A flash memory includes a memory array comprising a plurality of blocks, and a word line selection circuit, wherein each of the plurality of blocks is formed by a plurality of cell units in a well. The cell unit comprises N memory cells, a selection transistor coupled to one terminal of the memory cells, a selection transistor coupled to the other terminal of the memory cells, and a dummy selection transistor coupled between the memory cells. The word line selection circuit splits the block into a first block and a second block to use according to the operation of data writing or data deleting.
Public/Granted literature
Information query
Patent Agency Ranking
0/0