发明授权
US09184233B2 Structure and method for defect passivation to reduce junction leakage for finFET device
有权
用于缺陷钝化的结构和方法，以减少finFET器件的结漏电
- 专利标题： Structure and method for defect passivation to reduce junction leakage for finFET device
- 专利标题（中）： 用于缺陷钝化的结构和方法，以减少finFET器件的结漏电
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申请号： US13779286申请日： 2013-02-27
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公开(公告)号： US09184233B2公开(公告)日： 2015-11-10
- 发明人: Mark van Dal
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Haynes and Boone, LLP
- 主分类号： H01L21/02
- IPC分类号： H01L21/02 ; H01L29/06 ; H01L21/265 ; H01L21/8234 ; H01L27/088 ; H01L21/762
摘要：
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate of a first semiconductor material; shallow trench isolation (STI) features formed in the semiconductor substrate; and a fin-like active region of a second semiconductor material epitaxy grown on the semiconductor substrate. The first semiconductor material has a first lattice constant and the second semiconductor material has a second lattice constant different from the first lattice constant. The fin-like active region further includes fluorine species.
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