Invention Grant
US09190284B2 Process for treating a semiconductor-on-insulator structure for improving thickness uniformity of the semiconductor layer 有权
用于处理绝缘体上半导体结构以改善半导体层的厚度均匀性的方法

  • Patent Title: Process for treating a semiconductor-on-insulator structure for improving thickness uniformity of the semiconductor layer
  • Patent Title (中): 用于处理绝缘体上半导体结构以改善半导体层的厚度均匀性的方法
  • Application No.: US14397287
    Application Date: 2013-05-01
  • Publication No.: US09190284B2
    Publication Date: 2015-11-17
  • Inventor: Walter SchwarzenbachCarine DuretFrancois Boedt
  • Applicant: Soitec
  • Applicant Address: FR Bernin
  • Assignee: SOITEC
  • Current Assignee: SOITEC
  • Current Assignee Address: FR Bernin
  • Agency: TraskBritt
  • Priority: FR1254841 20120525
  • International Application: PCT/IB2013/000857 WO 20130501
  • International Announcement: WO2013/175278 WO 20131128
  • Main IPC: H01L21/306
  • IPC: H01L21/306 H01L21/66 H01L21/762
Process for treating a semiconductor-on-insulator structure for improving thickness uniformity of the semiconductor layer
Abstract:
The invention relates to a process for treating a structure of semiconductor-on-insulator type successively comprising a support substrate, a dielectric layer and a semiconductor layer having a thickness of less than or equal to 100 nm, the semiconductor layer being covered with a sacrificial oxide layer, comprising measuring, at a plurality of points distributed over the surface of the structure, the thickness of the sacrificial oxide layer and of the semiconductor layer, so as to produce a mapping of the thickness of the semiconductor layer and to determine, from the measurements, the average thickness of the semiconductor layer, selective etching of the sacrificial oxide layer so as to expose the semiconductor layer, and carrying out a chemical etching of the semiconductor layer, the application, temperature and/or duration conditions of which are adjusted as a function of the mapping and/or of the mean thickness of the semiconductor layer, so as to thin, at least locally, the semiconductor layer by a thickness identified as being an overthickness at the end of the measurement step.
Information query
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02 .半导体器件或其部件的制造或处理
H01L21/04 ..至少具有一个跃变势垒或表面势垒的器件,例如PN结、耗尽层、载体集结层
H01L21/18 ...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料
H01L21/30 ....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的(在半导体材料上制作电极的入H01L21/28)
H01L21/302 .....改变半导体材料的表面物理特性或形状的,例如腐蚀、抛光、切割
H01L21/306 ......化学或电处理,例如电解腐蚀(形成绝缘层的入H01L21/31;绝缘层的后处理入H01L21/3105)
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