Invention Grant
- Patent Title: Semiconductor device, semiconductor stacked module structure, stacked module structure and method of manufacturing same
- Patent Title (中): 半导体器件，半导体堆叠模块结构，堆叠模块结构及其制造方法
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Application No.: US14807193Application Date: 2015-07-23
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Publication No.: US09196507B1Publication Date: 2015-11-24
- Inventor: Hiroshi Inoue , Akio Katsumata , Shigenori Sawachi , Osamu Yamagata
- Applicant: Hiroshi Inoue , Akio Katsumata , Shigenori Sawachi , Osamu Yamagata
- Applicant Address: JP Usuki-shi, Oita
- Assignee: J-DEVICES CORPORATION
- Current Assignee: J-DEVICES CORPORATION
- Current Assignee Address: JP Usuki-shi, Oita
- Agency: Flynn, Thiel, Boutell & Tanis, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/02 ; H01L21/48 ; H01L21/82 ; H01L23/00
Abstract:
A method of manufacturing a semiconductor device having an insulating substrate, a semiconductor element which is mounted on one main surface of the insulating substrate via adhesive, with an element circuit surface of the semiconductor element facing upwards, a first insulating material layer (A) which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto, a first metal thin film wire layer provided on the first insulating material layer (A) and a portion of which is exposed to an external surface, a first insulating material layer (B) provided on the first metal thin film wire layer, a second insulating material layer provided on a main surface of the insulating substrate where the semiconductor element is not mounted, a second metal thin film wire layer provided inside the second insulating material layer.
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