Invention Grant
US09196642B2 Stress release layout and associated methods and devices 有权
压力释放布局及相关方法和装置

Stress release layout and associated methods and devices
Abstract:
An embodiment semiconductor device includes a substrate such as a silicon or silicon-containing film, a pixel array supported by the substrate, and a metal stress release feature arranged around a periphery of the pixel array. The metal stress release feature may be formed from metal strips or discrete metal elements. The metal stress release feature may be arranged in a stress release pattern that uses a single line or a plurality of lines. The metal stress release pattern may also use metal corner elements at ends of the lines.
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