Invention Grant
US09196710B2 Integrated circuits with relaxed silicon / germanium fins 有权
具有松散硅/锗鳍片的集成电路

Integrated circuits with relaxed silicon / germanium fins
Abstract:
Integrated circuits with relaxed silicon and germanium fins and methods for fabricating such integrated circuits are provided. The method includes a forming a crystalline silicon and germanium composite layer overlying a crystalline silicon substrate, where a composite layer crystal lattice is relaxed. A fin is formed in the composite layer, and a gate is formed overlying the fin. A portion of the fin is removed on opposite sides of the gate to form a drain cavity and a source cavity, and a source and a drain are formed in the source cavity and drain cavity, respectively.
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