On a display panel 10, a first scanning signal line drive circuit 12 is formed along a side of a display region 11 and a second scanning signal line drive circuit 13 is formed along the opposite side by the same process as pixel circuits. The size of a transistor included, the width of a wiring line, or the like, differs between the first and second scanning signal line drive circuits 12 and 13, and the two scanning signal line drive circuits have different sizes in a lateral direction. By this, the center of the display region matches that of a non-integral-type display panel, ensuring compatibility with the non-integral-type display panel. Moreover, by suitably determining the widths of or spacings between wiring lines included in the two scanning signal line drive circuits, leakage between the wiring lines and breaks in the wiring lines are reduced, improving yield of display panels.