Invention Grant
US09209095B2 III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method
有权
III-V,Ge或SiGe鳍基极横向双极晶体管结构和方法
- Patent Title: III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method
- Patent Title (中): III-V,Ge或SiGe鳍基极横向双极晶体管结构和方法
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Application No.: US14245683Application Date: 2014-04-04
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Publication No.: US09209095B2Publication Date: 2015-12-08
- Inventor: Josephine B. Chang , Gen P. Lauer , Isaac Lauer , Jeffrey W. Sleight
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Michael J. Chang, LLC
- Agent Louis J. Percello
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/84 ; H01L21/3065 ; H01L21/02 ; H01L21/24 ; H01L21/324 ; H01L21/225 ; H01L29/66 ; H01L29/735 ; H01L29/417 ; H01L29/78 ; H01L27/088 ; H01L27/092 ; H01L27/108

Abstract:
In one aspect, a method of fabricating a bipolar transistor device on a wafer includes the following steps. Fin hardmasks are formed on the wafer. A dummy gate is formed on the wafer, over the fin hardmasks. The wafer is doped to form emitter and collector regions on both sides of the dummy gate. A dielectric filler layer is deposited onto the wafer and the dummy gate is removed selective to the dielectric filler layer so as to form a trench in the filler layer. Fins are patterned in the wafer using the fin hardmasks exposed within the trench, wherein the fins will serve as a base region of the bipolar transistor device. The fins are recessed in the base region. The base region is re-grown from an epitaxial SiGe, Ge or III-V semiconductor material. A contact is formed to the base region.
Public/Granted literature
- US20150287650A1 III-V, GE, OR SIGE FIN BASE LATERAL BIPOLAR TRANSISTOR STRUCTURE AND METHOD Public/Granted day:2015-10-08
Information query
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