Invention Grant
US09209095B2 III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method 有权
III-V,Ge或SiGe鳍基极横向双极晶体管结构和方法

III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method
Abstract:
In one aspect, a method of fabricating a bipolar transistor device on a wafer includes the following steps. Fin hardmasks are formed on the wafer. A dummy gate is formed on the wafer, over the fin hardmasks. The wafer is doped to form emitter and collector regions on both sides of the dummy gate. A dielectric filler layer is deposited onto the wafer and the dummy gate is removed selective to the dielectric filler layer so as to form a trench in the filler layer. Fins are patterned in the wafer using the fin hardmasks exposed within the trench, wherein the fins will serve as a base region of the bipolar transistor device. The fins are recessed in the base region. The base region is re-grown from an epitaxial SiGe, Ge or III-V semiconductor material. A contact is formed to the base region.
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